In the development and fabrication of semiconductor elements, a semiconductor characteristic evaluation apparatus such as the semiconductor parametric testing apparatus according to Unexamined Japanese Patent Publication No. [Kokai] H2[1990]-56947 is employed for wafer process management. Naturally, the wafer management process is important in the mass production of semiconductor elements such as integrated circuits and preferably accumulates and establishes knowledge from the development stage of the semiconductor elements in order to smoothly move to mass production. For the wafer fabrication process, the introduction of 300-mm wafers at various companies in 2004 comes to mind. However, the development of new processes must always continue in order to further evolve each year.
For simplicity, in this specification, the development of semiconductor elements accompanying wafer process management is referred to as “wafer development”.
The simple example in FIG. 5 is used to explain parametric testing during wafer development. In FIG. 5, Project A (400) indicates the transitions in a series of various computer programs and various data types for wafer development. The development stage of a wafer in the project is divided into Phase 1 (401), Phase 2 (411), and Phase 3 (421) which develop wafers (402) of wafer type A1, wafers (410) of wafer type A2, and wafers (420) of wafer type A3, respectively. The wafer type refers to the type of wafer in the trial manufacture in each phase and is discriminated by the type and quantity of the device under test (DUT) formed on the wafer. The wafer type is almost the same type as in the phase, but the type sometimes changes slightly as the number of trial manufactures in a phase advances.
As an example, in the case considered, the object of Project A is to add a test element to the wafer for a new evaluation item. In Phase 1, as the initial stage, the basic shape of the test element is made and evaluated. In Phases 2 and 3, the basic shape is slightly changed and evolved, and finally the test element is completed on the wafer.
In each phase, the computer programs and data of a conventional parametric test are considered. In Phase 1, a plurality of wafer type A1 (402) prototype wafers is fabricated. Test program PA1 (404) and setup data therefor or parameter setup data SA1 (406) are created for the test. The resulting test result RA1 (408) is produced from the test results of each prototype wafer and stored. Similarly, in Phase 2, a plurality of wafer type A2 (410) prototype wafers is fabricated. Test program PA2 (412) and setup data SA2 (414) are created. Test result RA2 (416) is produced and stored. In Phase 3, a plurality of wafer type A3 (420) prototype wafers is fabricated. Test program PA3 (422) and setup data SA3 (424) are prepared for testing. Test result RA3 (426) is produced and stored.
In the past, these computer programs, setup data, and results were each assigned a file name by a user, and saved on floppy disks (registered trademark) or hard disks. However, if the user did not pay attention to the file names, there was the danger that computer programs and setup data previously created were overwritten. Furthermore, finding the computer programs and setup data used in other projects, and finding the test results of other projects for comparison with the newest test results were difficult procedures. These searches were the responsibility of management by all of the users. Therefore, each user entered the file name following a detailed rule and was required to manage his own notation fields for saving the attributes set for each file.
The setup data saved in each phase are overwritten unless the file name is intentionally changed and the data copied. The setup data used in the test of the first wafer trial fabrication of some phases are not kept even if using that data is preferred.
In other words, in the complex processes of semiconductor development and fabrication by a plurality of projects as described above, it was not easy for the users to manage the projects in order to enable the reuse of various computer programs, setup data, and test results.
The simple example in FIG. 5 was explained. However, in actual wafer development, a plurality of various types of DUTs is sometimes formed on one wafer. A plurality of test programs is prepared, and these programs include test programs used in a plurality of all types of DUTs. One test program is executed by using a plurality of setup data, and the number of measurement data becomes huge. In this complex situation, it is extremely difficult to provide management in order to enable the users to reuse various computer programs, setup data, and test results.